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network_protocol_programming_lab:15.2_cc1200_programming [2020/04/29 11:37] – ↷ Page name changed from network_protocol_programming_lab:15_cc1200_programming to network_protocol_programming_lab:15.2_cc1200_programming admin | network_protocol_programming_lab:15.2_cc1200_programming [2022/04/18 17:16] (current) – [Controlling CC1200] fangenoorth | ||
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#define SFTX 0x3B /**< Lösche den TX FIFO. */ | #define SFTX 0x3B /**< Lösche den TX FIFO. */ | ||
#define SWORRST | #define SWORRST | ||
- | #define SNOP | + | #define SNOP |
- | | + | |
</ | </ | ||
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===== Integrating SmartRF Studio Export Files ===== | ===== Integrating SmartRF Studio Export Files ===== | ||
- | As described in Section [[network_protocol_programming_lab: | + | As described in Section [[network_protocol_programming_lab: |
In the following, we will look at an example: | In the following, we will look at an example: | ||
- | Open SmartRF Studio | + | Open 4C and switch to //RX Synchronous Serial Mode// |
- | Export | + | The beginning of the file should look like this: |
<code C> | <code C> | ||
- | / | + | / |
- | | + | /* C-file generated by CC1200 Control Center |
- | * | + | /* */ |
- | | + | /* |
- | * | + | /***************************************************************/ |
- | * | + | |
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- | * | + | # |
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- | #ifndef SMARTRF_CC1200_H | ||
- | #define SMARTRF_CC1200_H | ||
- | |||
- | #define SMARTRF_RADIO_CC1200 | ||
- | #define SMARTRF_SETTING_IOCFG2 | ||
- | #define SMARTRF_SETTING_IOCFG0 | ||
- | #define SMARTRF_SETTING_SYNC_CFG1 | ||
- | #define SMARTRF_SETTING_MODCFG_DEV_E | ||
- | #define SMARTRF_SETTING_PREAMBLE_CFG1 | ||
- | #define SMARTRF_SETTING_PREAMBLE_CFG0 | ||
- | #define SMARTRF_SETTING_IQIC | ||
- | #define SMARTRF_SETTING_CHAN_BW | ||
- | #define SMARTRF_SETTING_MDMCFG1 | ||
- | #define SMARTRF_SETTING_MDMCFG0 | ||
- | #define SMARTRF_SETTING_SYMBOL_RATE2 | ||
- | #define SMARTRF_SETTING_SYMBOL_RATE1 | ||
- | #define SMARTRF_SETTING_SYMBOL_RATE0 | ||
- | #define SMARTRF_SETTING_AGC_REF | ||
- | #define SMARTRF_SETTING_AGC_CS_THR | ||
- | #define SMARTRF_SETTING_AGC_CFG3 | ||
- | #define SMARTRF_SETTING_AGC_CFG1 | ||
- | #define SMARTRF_SETTING_AGC_CFG0 | ||
- | #define SMARTRF_SETTING_FIFO_CFG | ||
- | #define SMARTRF_SETTING_FS_CFG | ||
- | #define SMARTRF_SETTING_PKT_CFG2 | ||
- | #define SMARTRF_SETTING_PKT_CFG1 | ||
- | #define SMARTRF_SETTING_PKT_CFG0 | ||
- | #define SMARTRF_SETTING_PKT_LEN | ||
- | #define SMARTRF_SETTING_IF_MIX_CFG | ||
- | #define SMARTRF_SETTING_FREQOFF_CFG | ||
- | #define SMARTRF_SETTING_TOC_CFG | ||
- | #define SMARTRF_SETTING_MDMCFG2 | ||
- | #define SMARTRF_SETTING_FREQ2 | ||
- | #define SMARTRF_SETTING_FREQ1 | ||
- | #define SMARTRF_SETTING_FREQ0 | ||
- | #define SMARTRF_SETTING_IF_ADC1 | ||
- | #define SMARTRF_SETTING_IF_ADC0 | ||
- | #define SMARTRF_SETTING_FS_DIG1 | ||
- | #define SMARTRF_SETTING_FS_DIG0 | ||
- | #define SMARTRF_SETTING_FS_CAL1 | ||
- | #define SMARTRF_SETTING_FS_CAL0 | ||
- | #define SMARTRF_SETTING_FS_DIVTWO | ||
- | #define SMARTRF_SETTING_FS_DSM0 | ||
- | #define SMARTRF_SETTING_FS_DVC0 | ||
- | #define SMARTRF_SETTING_FS_PFD | ||
- | #define SMARTRF_SETTING_FS_PRE | ||
- | #define SMARTRF_SETTING_FS_REG_DIV_CML | ||
- | #define SMARTRF_SETTING_FS_SPARE | ||
- | #define SMARTRF_SETTING_FS_VCO0 | ||
- | #define SMARTRF_SETTING_IFAMP | ||
- | #define SMARTRF_SETTING_XOSC5 | ||
- | #define SMARTRF_SETTING_XOSC1 | ||
- | #define SMARTRF_SETTING_SERIAL_STATUS | ||
- | |||
- | #endif | ||
</ | </ | ||
- | Now, modified the “SimpleTI setting”, that the register address will be exported. Save the exported file to '' | + | Transfer |
- | + | ||
- | <code C> | + | |
- | / | + | |
- | | + | |
- | * | + | |
- | | + | |
- | | + | |
- | * | + | |
- | | + | |
- | * | + | |
- | | + | |
- | + | ||
- | #ifndef SMARTRF_CC1200_ADR_H | + | |
- | #define SMARTRF_CC1200_ADR_H | + | |
- | + | ||
- | #define IOCFG2_ADR | + | |
- | #define IOCFG0_ADR | + | |
- | #define SYNC_CFG1_ADR | + | |
- | #define MODCFG_DEV_E_ADR | + | |
- | #define PREAMBLE_CFG1_ADR | + | |
- | #define PREAMBLE_CFG0_ADR | + | |
- | #define IQIC_ADR | + | |
- | #define CHAN_BW_ADR | + | |
- | #define MDMCFG1_ADR | + | |
- | #define MDMCFG0_ADR | + | |
- | #define SYMBOL_RATE2_ADR | + | |
- | #define SYMBOL_RATE1_ADR | + | |
- | #define SYMBOL_RATE0_ADR | + | |
- | #define AGC_REF_ADR | + | |
- | #define AGC_CS_THR_ADR | + | |
- | #define AGC_CFG3_ADR | + | |
- | #define AGC_CFG1_ADR | + | |
- | #define AGC_CFG0_ADR | + | |
- | #define FIFO_CFG_ADR | + | |
- | #define FS_CFG_ADR | + | |
- | #define PKT_CFG2_ADR | + | |
- | #define PKT_CFG1_ADR | + | |
- | #define PKT_CFG0_ADR | + | |
- | #define PKT_LEN_ADR | + | |
- | #define IF_MIX_CFG_ADR | + | |
- | #define FREQOFF_CFG_ADR | + | |
- | #define TOC_CFG_ADR | + | |
- | #define MDMCFG2_ADR | + | |
- | #define FREQ2_ADR | + | |
- | #define FREQ1_ADR | + | |
- | #define FREQ0_ADR | + | |
- | #define IF_ADC1_ADR | + | |
- | #define IF_ADC0_ADR | + | |
- | #define FS_DIG1_ADR | + | |
- | #define FS_DIG0_ADR | + | |
- | #define FS_CAL1_ADR | + | |
- | #define FS_CAL0_ADR | + | |
- | #define FS_DIVTWO_ADR | + | |
- | #define FS_DSM0_ADR | + | |
- | #define FS_DVC0_ADR | + | |
- | #define FS_PFD_ADR | + | |
- | #define FS_PRE_ADR | + | |
- | #define FS_REG_DIV_CML_ADR | + | |
- | #define FS_SPARE_ADR | + | |
- | #define FS_VCO0_ADR | + | |
- | #define IFAMP_ADR | + | |
- | #define XOSC5_ADR | + | |
- | #define XOSC1_ADR | + | |
- | #define SERIAL_STATUS_ADR | + | |
- | + | ||
- | #endif | + | |
- | </ | + | |
- | + | ||
- | Transfer these two files to the BeagleBone Black and include | + | |
<code C> | <code C> | ||
- | cc1200_reg_write(IOCFG2_ADR, SMARTRF_SETTING_IOCFG2); | + | cc1200_reg_write(RegSettings[0].adr, RegSettings[0].val); // GPIO3 IO Pin Configuration |
- | cc1200_reg_write(IOCFG0_ADR, SMARTRF_SETTING_IOCFG0); | + | cc1200_reg_write(RegSettings[1].adr, RegSettings[2].val); // GPIO2 IO Pin Configuration |
// ... | // ... | ||
// Programm the RF frequency | // Programm the RF frequency | ||
- | cc1200_reg_write(FREQ2_ADR, SMARTRF_SETTING_FREQ2); | + | cc1200_reg_write(ExtRegSettings[12].adr, ExtRegSettings[12].val); //FREQ2 |
- | cc1200_reg_write(FREQ1_ADR, SMARTRF_SETTING_FREQ1); | + | cc1200_reg_write(ExtRegSettings[13].adr, ExtRegSettings[13].val); //FREQ1 |
- | cc1200_reg_write(FREQ0_ADR, SMARTRF_SETTING_FREQ0); | + | cc1200_reg_write(ExtRegSettings[14].adr, ExtRegSettings[14].val); //FREQ0 |
// ... | // ... | ||
- | cc1200_reg_write(SERIAL_STATUS_ADR, | + | // you can program the above using a loop |
</ | </ | ||